15d1601eef1f8db8a0a325a287273410d8838356
[openwrt/openwrt.git] /
1 From b48887d5de9921d0ff9e88068e3cd555a383d702 Mon Sep 17 00:00:00 2001
2 From: Shiji Yang <yangshiji66@outlook.com>
3 Date: Sun, 22 Dec 2024 17:06:59 +0800
4 Subject: [PATCH 1/2] rt2x00: fix RFCSR register init values for RT5592
5
6 Based on Raink proprietary driver 2.7.1.5, correct the initial
7 values of some RFCSR registers for RT5592.
8
9 Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
10 ---
11 .../net/wireless/ralink/rt2x00/rt2800lib.c | 122 ++++++++----------
12 1 file changed, 53 insertions(+), 69 deletions(-)
13
14 --- a/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
15 +++ b/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
16 @@ -3576,9 +3576,8 @@ static void rt2800_config_channel_rf55xx
17
18 /* TODO RF27 <- tssi */
19
20 - rfcsr = rf->channel <= 10 ? 0x07 : 0x06;
21 - rt2800_rfcsr_write(rt2x00dev, 23, rfcsr);
22 - rt2800_rfcsr_write(rt2x00dev, 59, rfcsr);
23 + rt2800_rfcsr_write(rt2x00dev, 23, rf->channel <= 10 ? 0x08 : 0x07);
24 + rt2800_rfcsr_write(rt2x00dev, 59, rf->channel <= 4 ? 0x06 : 0x04);
25
26 if (is_11b) {
27 /* CCK */
28 @@ -3599,7 +3598,7 @@ static void rt2800_config_channel_rf55xx
29 power_bound = POWER_BOUND;
30 ep_reg = 0x2;
31 } else {
32 - rt2800_rfcsr_write(rt2x00dev, 10, 0x97);
33 + rt2800_rfcsr_write(rt2x00dev, 10, 0x95);
34 /* FIMXE: RF11 overwrite */
35 rt2800_rfcsr_write(rt2x00dev, 11, 0x40);
36 rt2800_rfcsr_write(rt2x00dev, 25, 0xBF);
37 @@ -3608,13 +3607,15 @@ static void rt2800_config_channel_rf55xx
38 rt2800_rfcsr_write(rt2x00dev, 37, 0x04);
39 rt2800_rfcsr_write(rt2x00dev, 38, 0x85);
40 rt2800_rfcsr_write(rt2x00dev, 40, 0x42);
41 - rt2800_rfcsr_write(rt2x00dev, 41, 0xBB);
42 + rt2800_rfcsr_write(rt2x00dev, 41, 0xAB);
43 rt2800_rfcsr_write(rt2x00dev, 42, 0xD7);
44 - rt2800_rfcsr_write(rt2x00dev, 45, 0x41);
45 + rt2800_rfcsr_write(rt2x00dev, 45, 0x01);
46 rt2800_rfcsr_write(rt2x00dev, 48, 0x00);
47 rt2800_rfcsr_write(rt2x00dev, 57, 0x77);
48 + rt2800_rfcsr_write(rt2x00dev, 58, 0x19);
49 rt2800_rfcsr_write(rt2x00dev, 60, 0x05);
50 rt2800_rfcsr_write(rt2x00dev, 61, 0x01);
51 + rt2800_rfcsr_write(rt2x00dev, 62, 0x19);
52
53 /* TODO RF27 <- tssi */
54
55 @@ -3623,82 +3624,59 @@ static void rt2800_config_channel_rf55xx
56 rt2800_rfcsr_write(rt2x00dev, 12, 0x2E);
57 rt2800_rfcsr_write(rt2x00dev, 13, 0x22);
58 rt2800_rfcsr_write(rt2x00dev, 22, 0x60);
59 - rt2800_rfcsr_write(rt2x00dev, 23, 0x7F);
60 - if (rf->channel <= 50)
61 - rt2800_rfcsr_write(rt2x00dev, 24, 0x09);
62 - else if (rf->channel >= 52)
63 - rt2800_rfcsr_write(rt2x00dev, 24, 0x07);
64 + rt2800_rfcsr_write(rt2x00dev, 23, 0x7E);
65 + rt2800_rfcsr_write(rt2x00dev, 24, 0x07);
66 rt2800_rfcsr_write(rt2x00dev, 39, 0x1C);
67 rt2800_rfcsr_write(rt2x00dev, 43, 0x5B);
68 - rt2800_rfcsr_write(rt2x00dev, 44, 0X40);
69 rt2800_rfcsr_write(rt2x00dev, 46, 0X00);
70 - rt2800_rfcsr_write(rt2x00dev, 51, 0xFE);
71 - rt2800_rfcsr_write(rt2x00dev, 52, 0x0C);
72 - rt2800_rfcsr_write(rt2x00dev, 54, 0xF8);
73 + rt2800_rfcsr_write(rt2x00dev, 51, 0xFD);
74 + rt2800_rfcsr_write(rt2x00dev, 52, 0x0E);
75 + rt2800_rfcsr_write(rt2x00dev, 55, 0x04);
76 + rt2800_rfcsr_write(rt2x00dev, 56, 0xBB);
77 + rt2800_rfcsr_write(rt2x00dev, 59, 0x7C);
78 +
79 if (rf->channel <= 50) {
80 - rt2800_rfcsr_write(rt2x00dev, 55, 0x06),
81 - rt2800_rfcsr_write(rt2x00dev, 56, 0xD3);
82 + rt2800_rfcsr_write(rt2x00dev, 44, 0X32);
83 + rt2800_rfcsr_write(rt2x00dev, 54, 0xF9);
84 } else if (rf->channel >= 52) {
85 - rt2800_rfcsr_write(rt2x00dev, 55, 0x04);
86 - rt2800_rfcsr_write(rt2x00dev, 56, 0xBB);
87 + rt2800_rfcsr_write(rt2x00dev, 44, 0X2A);
88 + rt2800_rfcsr_write(rt2x00dev, 54, 0xF8);
89 }
90 -
91 - rt2800_rfcsr_write(rt2x00dev, 58, 0x15);
92 - rt2800_rfcsr_write(rt2x00dev, 59, 0x7F);
93 - rt2800_rfcsr_write(rt2x00dev, 62, 0x15);
94 -
95 } else if (rf->channel >= 100 && rf->channel <= 165) {
96 -
97 rt2800_rfcsr_write(rt2x00dev, 12, 0x0E);
98 rt2800_rfcsr_write(rt2x00dev, 13, 0x42);
99 rt2800_rfcsr_write(rt2x00dev, 22, 0x40);
100 - if (rf->channel <= 153) {
101 - rt2800_rfcsr_write(rt2x00dev, 23, 0x3C);
102 - rt2800_rfcsr_write(rt2x00dev, 24, 0x06);
103 - } else if (rf->channel >= 155) {
104 - rt2800_rfcsr_write(rt2x00dev, 23, 0x38);
105 - rt2800_rfcsr_write(rt2x00dev, 24, 0x05);
106 - }
107 + rt2800_rfcsr_write(rt2x00dev, 52, 0x06);
108 + rt2800_rfcsr_write(rt2x00dev, 55, 0x01);
109 +
110 if (rf->channel <= 138) {
111 + rt2800_rfcsr_write(rt2x00dev, 23, 0x7C);
112 rt2800_rfcsr_write(rt2x00dev, 39, 0x1A);
113 rt2800_rfcsr_write(rt2x00dev, 43, 0x3B);
114 - rt2800_rfcsr_write(rt2x00dev, 44, 0x20);
115 rt2800_rfcsr_write(rt2x00dev, 46, 0x18);
116 - } else if (rf->channel >= 140) {
117 + } else {
118 + rt2800_rfcsr_write(rt2x00dev, 23, 0x78);
119 rt2800_rfcsr_write(rt2x00dev, 39, 0x18);
120 rt2800_rfcsr_write(rt2x00dev, 43, 0x1B);
121 - rt2800_rfcsr_write(rt2x00dev, 44, 0x10);
122 rt2800_rfcsr_write(rt2x00dev, 46, 0X08);
123 }
124 - if (rf->channel <= 124)
125 - rt2800_rfcsr_write(rt2x00dev, 51, 0xFC);
126 - else if (rf->channel >= 126)
127 - rt2800_rfcsr_write(rt2x00dev, 51, 0xEC);
128 - if (rf->channel <= 138)
129 - rt2800_rfcsr_write(rt2x00dev, 52, 0x06);
130 - else if (rf->channel >= 140)
131 - rt2800_rfcsr_write(rt2x00dev, 52, 0x06);
132 - rt2800_rfcsr_write(rt2x00dev, 54, 0xEB);
133 - if (rf->channel <= 138)
134 - rt2800_rfcsr_write(rt2x00dev, 55, 0x01);
135 - else if (rf->channel >= 140)
136 - rt2800_rfcsr_write(rt2x00dev, 55, 0x00);
137 - if (rf->channel <= 128)
138 - rt2800_rfcsr_write(rt2x00dev, 56, 0xBB);
139 - else if (rf->channel >= 130)
140 - rt2800_rfcsr_write(rt2x00dev, 56, 0xAB);
141 - if (rf->channel <= 116)
142 - rt2800_rfcsr_write(rt2x00dev, 58, 0x1D);
143 - else if (rf->channel >= 118)
144 - rt2800_rfcsr_write(rt2x00dev, 58, 0x15);
145 - if (rf->channel <= 138)
146 - rt2800_rfcsr_write(rt2x00dev, 59, 0x3F);
147 - else if (rf->channel >= 140)
148 - rt2800_rfcsr_write(rt2x00dev, 59, 0x7C);
149 - if (rf->channel <= 116)
150 - rt2800_rfcsr_write(rt2x00dev, 62, 0x1D);
151 - else if (rf->channel >= 118)
152 - rt2800_rfcsr_write(rt2x00dev, 62, 0x15);
153 +
154 + if (rf->channel <= 114) {
155 + rt2800_rfcsr_write(rt2x00dev, 24, 0x02);
156 + rt2800_rfcsr_write(rt2x00dev, 44, 0x1A);
157 + rt2800_rfcsr_write(rt2x00dev, 54, 0xEA);
158 + rt2800_rfcsr_write(rt2x00dev, 56, 0xB3);
159 + } else {
160 + rt2800_rfcsr_write(rt2x00dev, 24, 0x03);
161 + rt2800_rfcsr_write(rt2x00dev, 44, 0x0A);
162 + rt2800_rfcsr_write(rt2x00dev, 54, 0xF9);
163 + rt2800_rfcsr_write(rt2x00dev, 56, 0x9B);
164 + }
165 +
166 + rt2800_rfcsr_write(rt2x00dev, 51, rf->channel <= 124 ? 0xFC : 0xEC);
167 + rt2800_rfcsr_write(rt2x00dev, 58, rf->channel <= 116 ? 0x1D : 0x15);
168 + rfcsr = (rf->channel >= 116 && rf->channel <= 138) ? 0x7E : 0x7C;
169 + rt2800_rfcsr_write(rt2x00dev, 59, rfcsr);
170 }
171
172 power_bound = POWER_BOUND_5G;
173 @@ -3710,7 +3688,7 @@ static void rt2800_config_channel_rf55xx
174 rt2x00_set_field8(&rfcsr, RFCSR49_TX, power_bound);
175 else
176 rt2x00_set_field8(&rfcsr, RFCSR49_TX, info->default_power1);
177 - if (is_type_ep)
178 + if (!is_type_ep)
179 rt2x00_set_field8(&rfcsr, RFCSR49_EP, ep_reg);
180 rt2800_rfcsr_write(rt2x00dev, 49, rfcsr);
181
182 @@ -3719,7 +3697,7 @@ static void rt2800_config_channel_rf55xx
183 rt2x00_set_field8(&rfcsr, RFCSR50_TX, power_bound);
184 else
185 rt2x00_set_field8(&rfcsr, RFCSR50_TX, info->default_power2);
186 - if (is_type_ep)
187 + if (!is_type_ep)
188 rt2x00_set_field8(&rfcsr, RFCSR50_EP, ep_reg);
189 rt2800_rfcsr_write(rt2x00dev, 50, rfcsr);
190
191 @@ -3740,7 +3718,6 @@ static void rt2800_config_channel_rf55xx
192 rt2x00_set_field8(&rfcsr, RFCSR1_RX2_PD, 0);
193
194 rt2800_rfcsr_write(rt2x00dev, 1, rfcsr);
195 - rt2800_rfcsr_write(rt2x00dev, 6, 0xe4);
196
197 if (conf_is_ht40(conf))
198 rt2800_rfcsr_write(rt2x00dev, 30, 0x16);
199 @@ -8505,12 +8482,15 @@ static void rt2800_init_rfcsr_5392(struc
200
201 static void rt2800_init_rfcsr_5592(struct rt2x00_dev *rt2x00dev)
202 {
203 + u16 eeprom;
204 +
205 rt2800_rf_init_calibration(rt2x00dev, 30);
206
207 rt2800_rfcsr_write(rt2x00dev, 1, 0x3F);
208 + rt2800_rfcsr_write(rt2x00dev, 2, 0x80);
209 rt2800_rfcsr_write(rt2x00dev, 3, 0x08);
210 rt2800_rfcsr_write(rt2x00dev, 5, 0x10);
211 - rt2800_rfcsr_write(rt2x00dev, 6, 0xE4);
212 + rt2800_rfcsr_write(rt2x00dev, 6, 0xE0);
213 rt2800_rfcsr_write(rt2x00dev, 7, 0x00);
214 rt2800_rfcsr_write(rt2x00dev, 14, 0x00);
215 rt2800_rfcsr_write(rt2x00dev, 15, 0x00);
216 @@ -8526,9 +8506,13 @@ static void rt2800_init_rfcsr_5592(struc
217 rt2800_rfcsr_write(rt2x00dev, 34, 0x07);
218 rt2800_rfcsr_write(rt2x00dev, 35, 0x12);
219 rt2800_rfcsr_write(rt2x00dev, 47, 0x0C);
220 - rt2800_rfcsr_write(rt2x00dev, 53, 0x22);
221 + rt2800_rfcsr_write(rt2x00dev, 53, 0x44);
222 rt2800_rfcsr_write(rt2x00dev, 63, 0x07);
223
224 + eeprom = rt2800_eeprom_read(rt2x00dev, EEPROM_NIC_CONF2);
225 + if (!rt2x00_get_field16(eeprom, EEPROM_NIC_CONF2_CRYSTAL))
226 + rt2800_rfcsr_write(rt2x00dev, 6, 0xE4);
227 +
228 rt2800_rfcsr_write(rt2x00dev, 2, 0x80);
229 msleep(1);
230